See our demonstration of new PCIe® 6.0 Tx measurement methodologies on the state-of-art Synopsys® PHY and a discussion of techniques for solving new multilevel validation challenges.  The January PCI-SIG® Base specification release introduced PAM4 signaling with a low latency FEC implementation to achieve 64 GT/s. The standard can support up to 256 GB/s bi-directionally with maximum lane support targeting high performance computing, AI, and networking bandwidth demands. View the demo here, then learn more about our solutions for PCI Express® testing.  (Synopsys is a registered trademark of Synopsys, Inc.; PCI-SIG, PCIe, and PCI Express are a registered trademarks of PCI-SIG.)