Introduction
When developing new materials and technologies, quality development plays a key role in testing the reliability of such products. Faults overlooked in the product during this phase could mean costly delays when going to market or even the death of the project. Reliability tests improve quality, reduce failure rates, ensure high yields, and increase confidence. Improving the efficiency of these tests increases throughput which shortens the time between technology development and production.
Reliability testing may occur during both the quality development phase and the production phase. Quality improvement, which covers finding the causes of failure and the improvement of failure modes, and lifetime estimation, which requires determining the product’s time to failure or degradation, typically occur during the quality development stage. Meanwhile, burn-in and quality assurance tests for generating evidence that the product does not degrade under different stress conditions usually happen during the production phase. Figure 1 shows the rate of failure over time and when different reliability tests occur.
Stress is an important factor in reliability testing due to its ability to accelerate the aging process for lifetime estimation as well as for weeding out defects and random failures. To accelerate this process further, we can maximize DUT (device under test) numbers and increase throughput while minimizing costs via shared stress testing (Figure 2).
Keithley ACS software version 6.3 supports the shared stress methodology for high volume reliability testing, accelerating test times.
Shared Stress in ACS Software v6.3
Shared stress in ACS software v6.3 allows users to apply different reliability test methods such as TDDB, AC-TDDB, TZDB, and HTRB to large groups of DUTs in parallel.
To access the shared stress sample projects available in version 6.3, select File -> Open Project and choose one of the Shared_Stress_Example projects (Figure 3).
Each of the projects utilize a different shared stress method as illustrated in Figure 4. The first two cases utilize a probe card to move between different sites on the wafer being tested. Case 1 involves probing multiple sites at a time, while case 2 prioritizes probing multiple devices on a single site. Case 3 is for when a heat bath is being applied to the diced wafer chip, requiring fixed connections to each site.
Figure 5 charts the structure of the shared stress test as it is configured within ACS software. The device file contains the user defined attributes and device IDs, as shown in Figure 6.
Figure 7 shows how the instrumentation is configured for a shared stress test project. A switch matrix is used to control when stress is applied to the DUTs and when measurements are taken.
Conclusion
ACS software provides all the tools required for shared stress reliability testing and makes automating the tests easy. Three new sample projects were added, each utilizing a different probing method. Along with these projects, a new PTM (python test module) library and linear parametric test library (ptmlpt) have been implemented as well. The ptmlpt can be used with the 4200A, and the PTM can be modified by the user as needed, showing that ACS software offers the flexibility to support almost any reliability test application.
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